A Si metal insulator semiconductor tunnel emitter transistor (Si MIS TET) which is a new type of bipolar transistor was fabricated and its electrical properties for the temperature range of 100 K - 300 K were investigated. The common emitter mode current gain obtained was 75 at 300 K and 74 at 100 K. It was confirmed by measuring the temperature dependence of the base current that the inversion base layer indeed functioned as a base of the Si MIS TET. The current gain of the Si MIS TET did not decrease at low temperature of 100 K, though the current gain of the conventional Si bipolar transistor decreases at low temperature due to the emitter bandgap narrowing in heavily doped emitter. This origin was that the carrier injection mechanism between the emitter and the base was tunneling.

Narrow emitter effects in self-aligned bipolar transistors are discussed. Besides the increase of a non-ideal base current, the decrease of an ideal base current is newly observed, and a consequent fluctuation of the current gain becomes wider in the smaller emitter geometry. Both phenomena are attributed to the reduction of an emitter-impurity concentration.

This paper describes IC-oriented high-performance AlGaAs/GaAs heterojunction bipolar transistors that were fabricated to demonstrate their great potential in applications to high-speed integrated circuits. A collector structure of ballistic collection transistors with a launcher (LBCTs) shortens the intrinsic delay time of the transistors. A novel and simple self-aligned fabrication process, which features an base-metal-overlaid structure (BMO), reduces emitter- and base-resistances and collector capacitance. The combination of the thin-collector LBCT layer structure and the BMO self-alignment technology raises the average value of cutoff frequency, fT, to 160 GHz with a standard deviation as small as 4.3 GHz. By modifying collector thickness and using Pt/Ti/Pt/Au as the base ohmic contact metal in BMO-LBCTs, the maximum oscillation frequency, fmax, reaches 148 GHz with a 114 GHz fT. A 2:1 multiplexer with retiming D-type flip-flops (DFFs) at input/output stages fabricated on a wafer with the thin-collector LBCT structure operates at 19 Gbit/s. A monolithic preamplifier fabricated on the same wafer has a transimpedance of 52 dBΩ with a 3-dB-down bandwidth of 18.5 GHz and a gain S21 OF 21 dB with a 3-dB-down bandwidth of 19 GHz. Finally, a 40 Gbit/s selector IC and a 50 GHz dynamic frequency divider that were successfully fabricated using the 148-GHz fmax technologies are described.

This paper describes the performance of AlGaAs/GaAs HBT's developed for power applications. Their applicability to power amplifiers used in digital mobile radio communications is examined through measurement and numerical simulation, considering both power capability and linearity. Power HBT's with carbon-doped base layers showed DC current gains over 90. A linear gain of 19.2 dB, a maximum output RF power of 32.5 dBm, and a power added efficiency of 56 percent were obtained at 950 MHz. Numerical simulations showed that the power efficiency of HBT amplifiers could be improved by using harmonic trap circuits. Intermodulation measurements showed that third-order distortions were at most 21 dBc level at the 1-dB gain compression point. RF spectrum simulations using π/4 shift QPSK modulation showed that side-band spectrum generation was less than 45 dBc level at points 50 kHz off of the carrier frequency. These properties indicate that the power handling capabilities and linearity of HBT amplifiers offer promising potentials for digital mobile radio communications.

We propose a high-speed SOI bipolar transistor fabricated using bonding and thinning techniques. It is important to replace SOI area except for devices with thick SiO2 to reduce parasitic capacitance. A thin SOI film with a thin buried layer helps meet this requirement. We formed a 1-µm-thick SOI film with a 0.7-µm-thick buried layer by ion implantation before wafer bonding pulse-field-assisted bonding and selective polishing. Devices were completely isolated by thick SiO2 using a thin SOI film and the LOCOS process. We fabricated epitaxial base transistors (EBTs) on bonded SOI. Our transistors had a cutoff frequency of 32 GHz.

Selective epitaxial growth technology has been extended to the base formation of a transistor on the basis of the SATURN (Self-Alignment Technology Utilizing Reserved Nitride) process, a high-speed bipolar LSI processing technology. The formation of a self-aligned base contact, coupled with SIC (Selective Ion-implanted Collector) fabricated by lowenergy ion implantation, has not only narrowed the transistor active regions but has drastically reduced the base width. A final base width of 800 and a maximum cut-off frequency of 31 GHz were achieved.

This letter describes the waveform relaxation algorithm with the dynamic circuit partitioning technique based on the operation point of bipolar devices. Finally, we verify its availability for the simulation of the digital bipolar transistor circuit.